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AMD ups its supercomputer components

News Analysis
Jun 14, 20224 mins
Data Center

A new AMD accelerated processing unit will deliver 8-times the performance of its current top ACU that powers the world's first exascale supercomputer.

conceptual representation invoking a powerful supercomputer futuristic servers
Credit: Vladimir Timofeev / Getty Images

AMD is working on an accelerated processing unit that will outperform its current top APU that powers the world’s first exascale supercomputer.

At its recent analyst day, the company introduced a new high-end accelerator, the Instinct MI300, an APU that combines Zen 4 CPUs, the latest generation of GPU technology, plus AMD’s Infinity Cache and Infinity architecture in one package. It will deliver eight times the AI performance of AMD’s current high-end ACU, the MI250, and will be available next year.

A pool of high-bandwidth memory on the ACU is shared between the CPU and the GPU allowing them to communicate freely without the performance or energy overhead of redundant memory copies.

“It’s designed for memory bandwidth application latency, and delivers substantial power savings over the alternative architectures,” said Forrest Norrod, senior vice president of AMD’s data center solutions group. “And we’re going to be very pleased to talk more about this as we get closer to the introduction.”

Right now, AMD has major bragging rights in that the world’s fastest supercomputer is powered by a combination of Epyc CPUs and Instinct MI250 accelerators.

Zen 4 update

Also at the analyst day, CTO Mark Papermaster said the company’s Zen 4 microarchitecture will offer 15% improved single-thread performance in data-center applications over current products plus the addition of AVX512 instructions for HPC applications.

Zen 4 comes to market this year and will be the world’s first 5nm CPU with design changes to enable higher frequency in addition to the improved performance. Overall, Zen 4 will feature a 25% improvement in performance per watt over Zen 3 and an overall 35% performance improvement versus Zen 3.

AMD also mentioned Siena, describing it as a Zen 4-based server processor and the first Epyc processor optimized for intelligent edge and communications deployments that require high compute densities in a low-cost, power-efficient platform.

Papermaster said Zen 5, due in 2024, will be a ground-up new microarchitecture designed to address some architectural issues for scaling across a broad range of workloads as well as further optimizations for AI workloads. He did not offer further details.

Xilinx, Pensando assets

CEO Lisa Su said AMD’s two recent acquisitions—FPGA maker Xilinx and networking vendor Pensando—are expected to contribute to the company’s top line and bottom line. Xilinx is expanding the market for AMD products and Pensando is broadening its data-center solutions. “So our goal is to be the most strategic supplier to the largest data centers in the world,” she said. “Pensando has really leadership technology on the DPU front, and what we see is that the solutions will now work hand-in-hand with the rest of our computing technologies.”

The Xilinx and Pensando acquisitions bring three networking products to AMD: Solarflare, acquired by Xilinx in 2019, and used for ultra-low latency scenarios such as financial exchanges; Alveo, Xilinx’s FPGA-based adaptive accelerator for custom networking functions; and Pensando, used for high-volume network flows and processes.

“I’m pleased to say that we now have the broadest set of security technology that we’ve ever had, and a set of technologies that allow us to secure the server from boot,” said Norrod. “So [we are] truly securing the entire node, and now with the Alveo and Pensando technology, we can secure the firewall with encryption on every port.”

AMD’s goal is to offer a complete set of management and security services extending out to the edge and throughout the whole network. “Our technology allows us to gain telemetry and allow our customers to fully monitor what’s going on in the data center without taking a performance penalty from doing so,” said Norrod.